DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
555-230-126
Issue 4
June 1999
Maintenance Object Repair Procedures
9-1036MEM-BD (32MB Memory Circuit Pack)
9
Memory Burst Read Test (#908)
This test verifies that the Memory Burst Read function works properly on both the
Memory and Processor circuit packs. If the
test memory a|b
command is used,
this test executes once for each equipped Memory circuit pack
2334 ABORT The hardware mailbox on the standby Duplication Interface board is not ready
to receive messages.
1. Retry the command at 1-minute intervals, a maximum of 5 times.
FAIL The Memory EDC circuitry is not working correctly. The system may not
continue to operate correctly if single or multiple bit errors occur in Memory at
a later time. If the test fails on all equipped Memory circuit packs, the
Processor may be at fault. Run the tests described in the Processor section of
this manual.
1. Replace the affected Memory circuit when convenient.
2. If the test continues to fail after replacing the Memory circuit pack, replace
the Processor circuit pack. To replace the circuit packs, use the procedure
described in
Replacing SPE Circuit Packs
in Chapter 5.
PASS The Memory EDC circuitry is working normally.
Table 9-410. TEST #908 Memory Burst Read Test
Error
Code
Tes t
Result Description/ Recommendation
100 ABORT The requested test did not complete within the allowable time period.
1. Retry the command.
1022
1335
2500
ABORT Internal system error.
1. Retry the command.
1338 ABORT The test is not allowed to run since a planned SPE interchange is in progress.
This may be caused by a planned interchange initiated automatically during 24
hour scheduled testing.
1. Wait 3 minutes and retry the command.
Continued on next page
Table 9-409. TEST #907 Memory Error Detection/Correction Test — Continued
Error
Code
Te s t
Result Description/ Recommendation
Continued on next page
