DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
555-230-126
Issue 4
June 1999
Maintenance Object Repair Procedures
9-1026MEM-BD (32MB Memory Circuit Pack)
9
MEM-BD (32MB Memory Circuit
Pack)
The memory circuit packs contain the system software which is executed after it
is loaded from tape or disk. The processor and the memory circuit packs form
the most critical component for all system operation.
The processor must be able to access the memory for all system activity or the
system will go into SPE-down mode. In SPE-down mode, fatal memory errors
may show up as processor circuit pack errors.
Each memory circuit pack has 32 Mbytes of capacity. The SPE carrier(s) contain
four dedicated slots for Memory circuit packs. Depending on its size, the system
uses from two to four of these slots. Memory circuit packs must reside in
contiguous slots, starting Memory slot one.
Each Memory circuit pack contains its own error detection and correction (EDC)
circuit, parity checker and burst read function.
The EDC circuit operates by checking the contents of memory both as memory
locations are accessed by the Processor and periodically by a built-in
"scrubbing" function. The scrubbing function checks for errors through the entire
Memory circuit pack every 111 seconds. It flags and corrects single-bit errors
automatically and flags (but does not correct) multiple bit errors. If the EDC
circuit fails, the Memory circuit pack will not be able to detect and correct single
bit errors or detect and flag multiple bit errors. If a single or multiple bit error
occurs, the system may not continue to operate correctly.
The Memory parity checker detects bad parity over the Processor Bus when any
Bus Master writes memory. It also generates parity (for checking by the
MO Name (in
Alarm Log)
Alarm
Level Initial Command to Run
1
1. UU is the cabinet number (always 1, not required). With simplex SPE, carrier designation is not
required. With duplicated SPEs, carrier a or b must be specified.
S
is the number of the circuit
pack slot (1 to 4 for Memory slots). If the slot number is
not
specified, all Memory circuit packs
in the specified carrier will be tested.
Full Name of MO
MEM-BD MAJOR
2
2. After a spontaneous SPE interchange has occurred, the Alarm Log retains for three hours a
record of any MAJOR ON-BOARD alarm against an SPE component that took place before the
interchange. If a spontaneous interchange has occurred (as indicated by STBY-SPE error type
103 or the display initcauses screen), and handshake is down, (check with status spe),
replace the alarmed circuit pack on the standby SPE. If handshake is up, execute a test long
clear of the alarmed circuit pack and follow recommended procedures.
test memory UUCS l 32M Memory Circuit Pack
MEM-BD MINOR test memory UUCS s 32M Memory Circuit Pack
MEM-BD WARNING 32M Memory Circuit Pack
