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MSM80C154S/83C154S/85C154HVS
362
102. XCH A, @Rr (Exchange indirect address with accumulator)
1100011r
70
Instruction code
Operation
Number of bytes
Number of cycles
Flags
(PSW)
Description
Example XCH A, @R0
Instruction code
: Byte 1
(A)
←
→
((Rr)) r=0 or 1:
C AC F0 RS1 RS0 OV F1 P
•
:
:
:
The accumulator contents are exchanged with the data memory
location contents addressed by the register r, and the flag is
updated.
:
11000110
70
Byte 1
Accumulator
10011100
70
1
1
Before execution
Accumulator
01110110
70
After execution
:
Register 0
01001011
70
Register 0
01001011
70
4BH
01110110
70
4BH
10011100
70