INTRODUCTION
5
1.2 MSM80C154S/MSM83C154S Features
• Full static circuitry
• Internal program memory (ROM)
16384 words × 8 bits (MSM83C154S)
• External program memory (ROM)
Connectable up to 64K bytes
• Internal data memory (RAM)
256 words × 8 bits
• External data memory (RAM)
Connectable up to 64K bytes
• Four sets of working registers (R0 thru R7 × 4)
• Stack
Free use of 256-word × 8-bit internal data memory area
• Four input/output ports (8-bit × 4)
• Serial ports (UART operation)
• Six types of interrupts
(1) Two external interrupts
(2) Three timer interrupts
(3) One serial port interrupt
* Priority allocated interrupt processing
* Multi-level interrupt processing by software management
• CPU power down function
(1) Idle mode: CPU stopped while oscillation continued.
(Software setting)
(2) PD mode: CPU and oscillation all stopped.
(Software setting)
(Setting I/O ports to floating status possible)
(3) HPD mode: CPU and oscillation all stopped.
(Hardware setting)
(Setting I/O ports to floating status possible)
• CPU power down mode cancellation
(1) Execution commenced from address 0 by CPU resetting.
(IDLE, PD, and HPD mode cancellation)
* RESET pin is used
(2) Execution from interrupt address by interrupt request, or execution resumed from next
address after the stop address. (IDLE and PD mode cancellation)
* External, timer, and serial port interrupts
• I/O control registers (0F8H)
b0: Port 0, 1, 2, and 3 floating setting (PD, HPD)
b1: Port 1 high impedance input port setting
b2: Port 2 high impedance input port setting
b3: Port 3 high impedance input port setting
b4: Port 1, 2, and 3 pull-up resistance switching (10 kW pull-up resistance switch off to
leave only 100 kW)
b5: Serial port reception error detector bit
b6: 32-bit timer mode setting (TL0+TH0+TL1+TH1)