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MSM80C154S/83C154S/85C154HVS
340
81. ORL A, data address (Logical OR memory to accumulator)
01000101
70
Instruction code
Data address
Operation
Number of bytes
Number of cycles
Flags
(PSW)
Description
Example ORL A, 33H
Instruction code
: Byte 1
a7 a6 a5 a4 a3 a2 a1 a0
70
Byte 2
(A)←(A) OR (data address):
C AC F0 RS1 RS0 OV F1 P
•
:
:
:
The logical OR between the accumulator contents and the
specified data address contents is determined. The result is
placed in the accumulator and the flag is updated.
:
01000101
70
Byte 1
Accumulator
01011110
70
2
1
00110011
70
Byte 2
Before execution
Accumulator
11111111
70
After execution
:
33H
10100101
70
33H
10100101
70