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DESCRIPTION OF INSTRUCTIONS
277
28. CPL bit address (Complement bit)
10110010
70
Instruction code
Bit address
Operation
Number of bytes
Number of cycles
Flags
(PSW)
Description
Example CLR B.7
Instruction code
: Byte 1
b7 b6 b5 b4 b3 b2 b1 b0
70
Byte 2
(bit address)←(bit address):
C AC F0 RS1 RS0 OV F1 P
:
:
:
The specified bit address content is set to 1 if 0, and set to 0 if 1.:
10110010
70
Byte 1
B register
01010111
70
2
1
11110111
70
Byte 2
Before execution
B register
11010111
70
After execution
: