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MSM80C154S/83C154S/85C154HVS
140
4.7.5.2 Interrupt response time chart when interrupt conditions are satisfied during
execution of IE or IP register operation instruction in main routine
If interrupt conditions are satisfied during execution of an instruction used to manipulate the
interrupt enable register (IE) or the interrupt priority register (IP) in the main routine, the
MSM80C154S/MSM83C154S reactivates the interrupt mask circuit in the next cycle follow-
ing completion of the register manipulation instruction. If interrupt conditions were met as a
result of the re-interrupt mask, the interrupt address is called in the next cycle. That is, if the
interrupt conditions are satisfied during execution of the IE or the IP manipulating instruction,
the interrupt address is called after the next instruction is executed following execution of the
register manipulating instruction. The time chart is given in Figure 4-50.
* In the MOV data address 1, data address 2 instructions, transfer of data to another register
from IE or IP is an exception. (example: MOV ACC, IE)