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MSM80C154S/83C154S/85C154HVS
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Table 4-27 CPU pin details (ALF=1) in hard power down mode (HPD)
Name Internal ROM External ROM
P1.0/T2
P1.1/T2EX
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RESET
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/ T0
P3.5/ T1/HPDI
P3.6/ WR
P3.7/RD
XTAL 2
XTAL 1
V
SS
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
PSEN
ALE
EA
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
V
CC
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
“0” level input “0” level input
Floating Floating
Floating Floating
External data input External data input
External data input External data input
External data input External data input
“0” level input “0” level input
Floating Floating
Floating Floating
Oscillator operative Oscillator operative
Oscillator operative Oscillator operative
0 [V] 0 [V]
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
“0” level output “0” level output
“0” level output “0” level output
“1” level input “0” level input
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
Floating Floating
*+2.0~+6 [V] *+2.0~+6 [V]
* V
CC=+2.0~+6V when internal CPU data is held.