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SYSTEM CONFIGURATION
23
2.6.2 Major synchronizing signals
(1) ALE (Address Latch Enable)
The ALE signal is used as a clock signal where the address signals 0 thru 7 output from
CPU port 0 can be latched externally when external program or external data memory
(RAM) is used.
Although two ALE signal outputs are obtained in a single machine cycle during normal
operations, no output is obtained during output of the RD/WR signal when an external
memory instruction (MOVX...... ) is executed.
(2) PSEN (Program Store Enable)
The PSEN output signal is generated during execution of an external program. The
output is obtained when an instruction or data is fetched.
The PSEN signal is valid when at “0” level, and external program data is enabled when
in this valid state.
Although two PSEN signal outputs are obtained in a single machine cycle during
normal operations, no output is obtained during output of the RD/WR signal when an
external data memory instruction (MOVX...... ) is executed.
(3) WR (Write Strobe)
The WR output signal is obtained when an external data memory instruction (MOVX
@Rr, A or MOVX @ DPTR, A) is executed.
CPU port 0 output data is written in the external RAM when the WR signal is at “0” level.
(4) RD (Read Strobe)
The RD output signal is obtained when an external data memory instruction (MOVX
A, @ Rr or MOVX A, @ DPTR) is executed.
The external RAM is enabled and output data is passed to CPU port 0 when the RD
signal is at “0” level.