TDM Bus Configurations
38 Interphase Corporation
Multiplex Direct Mode
In this mode, PA(7) = SWMODE_N = 1 and PA(0) = COMCLK_N = 1.
In multiplex direct mode, the four framers have the same rhythm. The QuadFALC system
interface is in multiplex mode; the first QuadFALC TDM bus is directly tied to the CPM
TDM bus TDMa1. The TDM bus clock and the frame synchronization signal are provided
by the QuadFALC. In NT mode, the QuadFALC can synchronize on an external network
reference clock provided on connector P4.
Figure 1-9, Figure 1-10, and Figure 1-11 show the specific implementation of this mode.
Grey lines indicate unused connections.
Table 1-30. TDM and Synchronization Signals in Multiplex Direct Mode
2XWSXW ,QSXWV 'HVFULSWLRQ
5'2B
4XDG)$/&
7'0DB5; 0EVUHFHLYHGGDWDIURPWKHIRXU(7OLQHV7KH
4XDG)$/&V\VWHPLQWHUIDFHLVLQPXOWLSOH[PRGH
7'0DB7;&30 ;',B 0EVWUDQVPLWGDWDIRUWKHIRXU(7OLQHV7KH
4XDG)$/&V\VWHPLQWHUIDFHLVLQPXOWLSOH[PRGH
)6&
4XDG)$/&
53$
;3$
7'0DB/56<1&
.+]V\QFKURQL]DWLRQSXOVHJHQHUDWHGE\RQHRIWKHIRXU
'&25VXVHGIRUWKH7'0IUDPHV\QFKURQL]DWLRQFORFN
53$LQSXWLVFRQILJXUHGDV6<35
DQGXVHGIRUWKH5HFHLYH
)UDPH6\QFKURQRXV3XOVH&05,563 ;3$LV
FRQILJXUHGDV6<3;
DQGXVHGIRUWKH7UDQVPLW)UDPH
6\QFKURQRXV3XOVH&05,;63 7'0DUHFHLYHDQG
WUDQVPLWFORFNVDUHFRPPRQ6,$05&57
5&/.
4XDG)$/&
6&/.5
6&/.;
7'0DB/5&/.
0+]GHMLWWHUHGFORFNJHQHUDWHGE\WKHRQHRIWKHIRXU
'&25FLUFXLWVRXWSXWRQ5&/.3&&53 DQGXVHG
IRUWKH7'0EXVFORFN6&/.5LQSXWLVXVHGIRUWKH
5HFHLYH6\VWHP&ORFN&05,56& 6&/.;LQSXWLV
XVHGIRUWKH7UDQVPLW6\VWHP&ORFN&05,;6& DQG
SURYLGHVWKHWUDQVPLWUK\WKPWRWKH'&2;FLUFXLWV7'0D
UHFHLYHDQGWUDQVPLWFORFNVDUHFRPPRQ6,$05&57
,Q/7PRGH'&25V\QFKURQL]HVRQRQHRIWKHIRXU
UHFRYHUHGOLQHFORFNV
,Q17PRGHWKH'&25V\QFKURQL]HVRQWKHH[WHUQDO6<1&
VLJQDO:KHQQRUHIHUHQFHFORFNLVSURYLGHGRQ6<1&
'&25LVLQIUHHUXQQLQJPRGH
)62+3 6<1& ([WHUQDOV\QFKURQL]DWLRQFORFNSURYLGHGWRWKH'&25LQ
17PRGH:KHQQRVLJQDOLVSURYLGHG6<1&LVWLHGWR
*1'