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4538 Hardware Reference Manual 1
1Hardware Description
Overview
The Interphase 4538 PMC E1/T1/J1 Communications Controller is a network interface PCI
Mezzanine Card (PMC) equipped with four software-selectable T1/E1/J1 interfaces (two
are provided on the front panel). The 4538 board is intended for 2G and 3G wireless
networks, Internet access, and Advanced Intelligent Network (AIN) applications.
This chapter provides the functional specification of the 4538. It describes how the different
main components of the board are arranged together.
The main components of the 4538 are:
• The PowerQUICC II™, a Motorola
®
MPC8260 RISC embedded processor.
• The Tundra PowerSpan™, a dedicated PCI bridge that controls the interface
between the card and the host 32-bit PCI bus.
• 4 MB of 8-bit FLASH EEPROM memory.
• 32 MB or 64 MB of 64-Bit SDRAM system memory
• The INFINEON QuadFALC™ framers, included in the 4538 communications
controller, which control four independent T1/E1/J1 interfaces. For each interface,
the QuadFALC includes a framer and a Line Interface Unit (LIU) with data and
clock recovery.
• The INTEL LXT971A, an IEEE compliant Fast Ethernet transceiver that supports
10BaseT/100BaseTX auto-negotiation and parallel detection.