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Chapter 1: Hardware Description
4538 Hardware Reference Manual 11
The two first TDM busses of each serial interface are connected to the four TDM busses of
the QuadFALC. The two others TDM busses of each serial interface are used in “pass
through mode”. The TDM busses are at a bit rate of 2.048 Mb/s or 8.192 Mb/s.
Bank of Clocks
The PowerQUICC II CPM features a bank of clocks that can be selected independently for
each device used. However, the choice for each device is limited. In addition to the ports
configuration as clock inputs, it is necessary to configure the clock source of each TDM
bus. For all the TDM busses used, the clock is common for receive and transmit directions
(configured in the SIxxMR registers).
Baud Rate Generator
The Baud Rate Generator receives CLK5 = 25.000 MHz ±20 ppm and provides BRG6 =
12.500 MHz ±20 ppm for the QuadFALC clock input.
Ethernet 10/100BaseT
The FCC3 part of the CPM is used to control an Ethernet 10/100baseT port. An on-board
LXT971A line interface unit controls the Ethernet interface to a RJ45 connector J3. The
CPM interface to the line interface unit is a MII (Media-Independent Interface) bus.
Table 1-10. CPM Bank of Clocks Usage
&ORFN &30,23RUW 8VDJH
&/. 3& 7'0D7'0G
&/. 3& 7'0E7'0F
&/. 3& 0+]IRU%5*
&/. 3& 7'0F7'0D
&/. 3& )DVW(WKHUQHW5[&ORFN
&/. 3& 7'0G7'0E
&/. 3& )DVW(WKHUQHW7[&ORFN
Table 1-11. CPM Baud Rate Usage
&ORFN &30,23RUW 8VDJH
%5* 3& 0+]SSPWR4XDG)$/&
Table 1-12. Ethernet Signals on the CPM
Ethernet Signal CPM I/O Port Dir Description
)(B7;'>@ 3% 2 7UDQVPLW1LEEOH'DWD
)(B5;'>@ 3% , 5HFHLYH1LEEOH'DWD
)(B&56 3% , &DUULHU6HQVH