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Chapter 1: Hardware Description
4538 Hardware Reference Manual 17
PowerSpan DMA Registers
These registers are used to control the four bidirectional DMA engines provided in the
PowerSpan. They are mapped in the PCI memory space (base address defined in PCI
configuration register 0x14 PCIBAR1) and in the local space for the local processor (base
address 0xF0020000).
Table 1-18. PowerSpan DMA Registers
Offset Register Description
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[& '0$B&33 '0$&RPPDQG3DFNHW3RLQWHU5HJLVWHU
[ '0$B*&65 '0$*HQHUDO&RQWURO5HJLVWHU
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[ '0$B65&B$''5 '0$6RXUFH$GGUHVV5HJLVWHU
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[ '0$B7&5 '0$7UDQVIHU&RQWURO5HJLVWHU
[& '0$B&33 '0$&RPPDQG3DFNHW3RLQWHU5HJLVWHU
[ '0$B*&65 '0$*HQHUDO&RQWURO5HJLVWHU
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[ '0$B7&5 '0$7UDQVIHU&RQWURO5HJLVWHU
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[ '0$B*&65 '0$*HQHUDO&RQWURO5HJLVWHU
[ '0$B$775 '0$$WWULEXWHV5HJLVWHU
[ '0$B65&B$''5 '0$6RXUFH$GGUHVV5HJLVWHU
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[$ '0$B7&5 '0$7UDQVIHU&RQWURO5HJLVWHU
[$& '0$B&33 '0$&RPPDQG3DFNHW3RLQWHU5HJLVWHU
[% '0$B*&65 '0$*HQHUDO&RQWURO5HJLVWHU
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