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The QuadFALC T1/E1/J1 Framer
32 Interphase Corporation
For each line x, the QuadFALC provides four transmit multifunction ports (XPA_x,
XPB_x, XPC_x and XPD_x) and four receive multifunction ports (RPA_x, RPB_x, RPC_x
and RPD_x). The tables below indicate how they are used on the 4538 (The RPD port is
detailed for each port, since its use differs from one port to another).
NOTE
The two synchronization green LEDs on the front panel are controlled by the RPD_1
and RPD_2 pins configured as RFSP
respectively. These LEDs can also be
controlled by software, by configuring RPD_1 and RPD_2 pins as RMFB and forcing
them to 0 or 1.
The local processor and the PCI host see the QuadFALC as an 8-bit peripheral including a
set of 1024 directly addressable registers. These registers are placed at contiguous modulo
8 addresses, starting at addresses 0xF008 0000. The QuadFALC controls its own interrupt
line to the local processor.
The QuadFALC reset input is controlled by a PowerQUICC II CPM I/O port PC(2),
(0=reset active).
The QuadFALC controls its own interrupt line to the local processor.
Table 1-28. QuadFALC Multifunction Port Usage
QuadFALC port Dir Function Usage
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