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MSM80C154S/83C154S/85C154HVS
22
S1 S2 S3 S4 S5 S6
M1
S1 S2 S3 S4 S5 S6
M1
S1 S2 S3 S4 S5 S6
M2
S1 S2 S3 S4 S5 S6
M1
PCL PCL PCL PCL PCL PCLACC & RAM
DPL & Rr
PCH PCH PCH PCH DPH & PORT DATA PCH PCH PCH
DATA STABLE DATA STABLE
PORT OLD DATA
PORT NEW DATA
Instruction decoding
Instruction excecution
PC+1 PC+1
TM+1
Instruction decoding
Instruction excecution
PC+1
TM+1 TM+1
Instruction decoding
Instruction excecution
PC+1 PC+1
TM+1
XTAL1
1
0
ALE
1
0
PSEN
1
0
RD/WR
1
0
PORT–0
1
0
PORT–2
1
0
CPU←PORT
1
0
PORT←CPU
1
0
STEP
CYCLE
Figure 2-9 MSM80C154S/MSM83C154S fundamental timing