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DESCRIPTION OF INSTRUCTIONS
257
12. ANL A, @Rr (Logical AND indirect address to accumulator)
0101011r
70
Instruction code
Operation
Number of bytes
Number of cycles
Flags
(PSW)
Description
Example ANL A, @R0
Instruction code
: Byte 1
(A)←(A) AND ((Rr)) r=0 or 1:
C AC F0 RS1 RS0 OV F1 P
•
:
:
:
The logical AND between the accumulator contents and the
data memory location contents addressed by the register r
contents is determined. The result is placed in the accumulator
and the flag is updated.
:
01010110
70
Byte 1
Accumulator
10101110
70
1
1
Before execution
Accumulator
10101010
70
After execution
:
Register 0
01011000
70
Register 0
01011000
70
RAM 58H
11111010
70
RAM 58H
11111010
70