Filter
Top Products
MP3 NG: A Next Generation Consumer Platform
XAPP169 (v1.0) November 24, 1999 www.xilinx.com 5
1-800-255-7778
R
The RC32364 interfaces to the system through a 32-bit multiplexed address/data bus. The bus
offers a rich set of signals to control transfers of which only a subset was required for this
application. Figure 4 shows the timing for read transactions on this bus.
MasterClock
AD(31:0)
Addr
Data Input
Addr(3:2)
ALE
DataEn*
Ack*
Last*
Rd*
CIP*
I/D*
DT/R*
Wr*
Addr
Data Input
Width(1:0)
Figure 4: RC32364 Read Timing
(Courtesy IDT)