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171
Figure 4-70 Restart from idle mode by reset (external ROM mode)
S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6
M1
S1 S2 S3 S4 S5 S6
M1
S1 S2 S3 S4 S5 S6
M1
XTAL1
1
0
ALE
S6
1
0
PSEN
1
0
PORT 0
1
0
PORT 1
1
0
PORT 2
1
0
PORT 3
1
0
PCON-bit 0
1
0
*RESET
1
0
EXECUTE CYCLERESET CYCLE
CPU RESET
CONTROL
1
0
IDLE MODE
PORT DATA=1
PORT DATA=1
PORT DATA=1
FLOATING
PORT DATA
PCLPCLPCL
PCH
PORT DATA
PCH PCH PCH
M1 → M2