6.1.2 ADC
1. Successive approximation ADC with sliding scale linearisation
● Channel splitting 128, 256, 512, 1K, 2K, or 4K
● Full input voltage range 3V, positive and negative (10V with external attenuator)
2. ADC Dead time (including time needed to write into memory)
● < 8 µsec
3. Nonlinearities
● Differential nonlinearity (over 95% channel range) <2%
● Integral nonlinearity (over 95% channel range) <0.1%
4. Peak capturing
● Works with pulse of gaussian shaping amplifier (range of shaping time constant
between 0.5µs and 5µs)
5. Temperature Stability
● TK 100 (ADC), TK 500 (Amplifier)
6. Discriminators and threshold
● Digital LLD and ULD (allows channelwise cutting)
● Analogue threshold (2...60% of ADC range)
● Multi Channel Scaling (MCS) mode allowing to count the following pulses
● TTL input pulses (minimum width of flat top 0.2µs) not routed through the ADC
(maximum rate 1 MHz)
● LLD/ULD counting mode, counting pulses within a preset digital window
● Count rate derived from internal amplifier ICR signal (maximum count rate
determined by count rate limitation of amplifier )
● Dwell time 0.01s to 500s
7. Spectrometric performance:
● Resolution (FWHM) for typical 500mm² planar HPGe detector for count rates <
10000cps and a Co-57 source at 122keV:
● 610±20eV at 1µs shaping time
● 580±20eV at 2µs shaping time
● Peak shift:
< 0.5% for 1µs shaping time and count rates from 1000 to 70000cps
< 0.2% for 2µs shaping time and count rates from 1000 to 40000cps
● deterioration of FWHM < 5% for both conditions
● Throughput in memory:
at least 25000cps in memory at 50000cps input rate and 1µs shaping time
at least 13000cps in memory at 30000cps input rate and 2µs shaping time