SMSC LAN91C111 32/16/8-Bit Three-In-One Fast Ethernet Controller
Revision 1.0 (08-14-08) 6 SMSC AN 9.6
APPLICATION NOTE
3.4.1 Typical Signal Connection with Asynchronous Buses
HOST SIGNALS
LAN91C111
SIGNALS NOTES
A1-A15 A1-A15 Address
D0-D31 D0-D31 Data
nBE [0-3] nBE[0-3] Byte Enable
AEN/CS AEN Active low address enable. It can be connected to ship select if the
chip select timing matches to AEN
Reset Reset Reset
nADS/Ground nADS Active low address latch signal. It can be tied low, please see the
timing diagrams figure 24 to 26 of the database.
IOCHRDY/Wait ARDY Asynchronous Ready Signal
INT INTRO Interrupt
nRD nRD Asynchronous read strobe
nWR nWR Asynchronous write strobe
CS nDATACS Use only for direct access to data register
nEX32/nIOCS16 nLDEV Active low local device signal. It must be buffered using an open
collector driver is ISA bus.
Unused Pins (Use only for Synchronous bus interface)
nCYCLE Pull up externally (May through 10KΩ resistor)
W/nR Pull up externally (May through 10KΩ resistor)
nVLBUS Leave open or Pull up externally
LCLK Pull up externally (May through 10KΩ
nSRDY Leave open
nRDYRTN Pull up externally (May through 10K
Ω resistor
