SMSC LAN91C111 32/16/8-Bit Three-In-One Fast Ethernet Controller
Revision 1.0 (08-14-08) 24 SMSC AN 9.6
APPLICATION NOTE
It‘s not recommend to implement PLL clock parts with LAN91C111. The device is very sensitive to PLL
clock jitters, which may cause startup and link problems.
4.2 Clock Oscillator
If an external clock is used, it should be connected to the input of the amplifier (XTAL1). If an oscillator
is to be used, leave XTAL2 floating. Driving XTAL2 could cause problems due to high gain and high
current.
Oscillator Specifications
Parameter Spec
Frequency 25 Mhz ± 50 ppm
Duty Cycle 45% to 55%
Output Load 10 TTL Max.
Oscillator components should be mounted as close to the chip and have short, direct traces to XTAL1,
XTAL2, and VSS pins. Noise arriving at XTAL1 or XTAL2 pins can cause a miscount in the internal
clock-generating circuitry. These kinds of glitches can be produced through capacitive coupling
between the oscillator components and PCB traces carrying digital signals with fast rise and fall times.
It is also recommended not to run any high-speed signals below the area of the crystal circuitry. Hand
layout for this area of the board is recommended.
4.3 X25OUT
X25OUT is 25Mhz-clock source provided by the LAN91C111 for an external PHY to eliminate the need
for an extra crystal or oscillator. This pin can be directly connected the clock oscillator input of the
external PHY. This clock source pin is active during reset.
4.4 Serial EEPROM Operation
The LAN91C111 supports a serial EEPROM interface. The EEPROM holds the following parameters:
1. Ethernet Individual Address
2. I/O Base Address
3. MII Interface
All of the above mentioned values are read from the EEPROM upon hardware reset. Except for the
INDIVIDUAL ADDRESS, the value of the IOS switches determines the offset within the EEPROM for
t2 Xtal1 High Time 18 ns
t3 Xtal1 Low time 18 ns
SYMBOL PARAMETER
LIMIT
UNITMIN. TYPICAL MAX.
