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MZ-N1
3131
6-2. BLOCK DIAGRAM – AUDIO Section –
VC B+
F801
F
RMC KEY
RVDD
DTCK
KEY-R
RGND
(LINE IN JACK)
OPTICAL
RECEIVER
J302
i/LINE OUT
J301
LINE IN
(OPT)
J303
MIC
(PLUG IN POWER)
• SIGNAL PATH
: PLAYBACK
: REC (ANALOG IN)
: REC (DIGITAL IN)
2
1113
5
4
16
10
9
12
13
3
1
14 15 16
49 103 60
AOUT
SEL
120
3758 36 65 38198
151
197
45
46
47
1
71
234
B+ SWITCH
Q302
VIF B+
REGULATOR
MUTING
MIC AMP
IC303
IN2
IN1
STBY
GV
OUT1
OUT2
HP/LINE
SWITCH
HEADPHONE AMP
IC302
LOUT
ROUT
GA-L
GA-R
L-IN
R-IN
HP/L
MUTE
BEEP
BEEP
XMUTE
XJAC DET
XOPT CTL
FS256
XBCK
OSCO
OSCI
XCS NV1
SDI0
SCK0
SDO0
OPT DET
MIC SENSE
XMIC DET
RMC DTCK
SYSTEM CONTROLLER,
DIGITAL SIGNAL PROCESSOR
16M BIT D-RAM
IC801 (2/3)
150
X802
45.1584MHz
SI0
SO0
SCK0
SDI0
SDO0
SCK0
SCK0
SDO0
AOUTL,
AOUTR
ADDT
DIN1
SDO0, SDI0, SCK0
XCS
SK
DI
DO
B
A
C
E
EEPROM
IC802
1
94
234
XCS NV2
SDIO
SCK0
SDO0
XCS
SK
DI
DO
EEPROM
IC803
2
4
1
3
10
15
14
13
9
GAIN
AMP
CLOCK
DIVIDER
AUDIO
I/F
CONTROL
CONTROL
REGISTER
I/F
A/D
CONVERTER
&
HPF
RIN1
RIN2
LIN1
LIN2
A/D CONVERTER
IC301
SDTO
CCLK
CSN
CDTI
12
LRCK
BCLK
16
PDN
11
MCLK
196
LRCK
148
XPD ADC
147 XCS ADC
AOUTL
AOUTR
D303
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